ADC main feature(1)

STM32F10X ADC main features

Regular and Injected conversions

 STM32 microcontrollers support two ADC conversion modes: regular and injected. Regular mode is what we used to see in many types of microcontroller (all channels share same data register). 사실 regular and injected conversions는 어떤 모드라고 하기 보다는 conversion 방법 중 하나라고 할 수 있다.

 conversion을 interrupt 없이 하는 것이 regular conversion이라 생각하면 되고 conversion 도중에 다른 conversion이 생겨서 interrupt와 비슷하게 중간에 끼어들어서 conversion이 가능한 것이 injected conversion이라고 생각하면 되겠다. 예를 들어서 아래에 설명하겠지만 ADC mode 중에 continuous mode가 있는데 continuous mode를 사용하면서 regular 하게 conversion 할것인가 아니면 Injected conversion을 할 것인가 선택할 수 있다.

 If normal group conversion is going on and injected conversion is triggered, then normal conversion is halted, then injected conversion is performed. When done normal conversion is resumed. Injected conversion channels have their own result registers and offset registers. Offset can store value that will be automatically deducted from ADC result.

Channel selection

 There are 16 multiplexed channels. It is possible to organize the conversions in two groups : regular and injected. A group consists of a sequence of conversions which can be done on any channel and in any order. For instance, it is possible to do the conversion in the following order: Ch3, Ch8, Ch2, Ch2, ch0, ch2, Ch2, Ch15.

- The regular group is composed of up to 16 conversions. The regular channels and their order in the conversion sequence must be selected in the ADC_SQRx registers. The total number of conversions in the regular group must be written in the L[3:0] bits in the ADC_SQR1 register.

- The injected group is composed of up to 4 conversions. The injected channels and their order in the conversion sequence must be selected in the ADC_JSQR register. The total number of conversions in the injected group must be written in the L[1:0]bits in the ADC_JSQR register.

* If the ADC_SQRx or ADC_JSQR registers are modifed during a conversion, the current conversion is reset and a new start pulse is sent to the ADC to convert the new chosen group.

ADC 설정을 끝내고 ADC ENABLE 시킨 후 ADC_RegularChannelConfig() 함수를 이용하여 ADC_SQRx register를 변경하면 원하는 결과가 안된다. ADC conversion 도중에 ADC_SQRx register 건들지 말것.

Timing diagram

 As shown below figure, the ADC needs a stabiliztion time of Tstab before it starts converting accurately. After the start of ADC conversion and after 14 clock cycles, the EOC flag is set and the 16bit ADC Data register contains the result of the conversion. EOC flag를 이용하여 ADC 완료 interrupt를 쓸 수 있다.

Analog watchdog

 The AWD analog watchdog status bit is set if the analog voltage converted by the ADC is below a low threshold or a high threshold. These thresholds are programmed in the 12 least significant bits of the ADC_HTR and ADC_LTR 16-bit registers. An interrupt can be enabled by using the AWDIE bit in the ADC_CR1 register.

 The threshold value is independent of the alignment selected by the ALIGN bit in the ADC_CR2 register. The comparison is done before the alignment. 이 문장이 아주 중요한 문장인데 ADC conversion이 끝난 후 ADC_DR 에 converted value가 저장되기 전에 threshold값과 비교한다는 말이다. 이것은 Independent mode(Dual mode를 안 쓰는 것)에서도 유용하게 쓸 수 있지만 더욱 유용하게 쓰이는 곳은 Dual mode이다. Dual mode에서 ADC1과 ADC2의 결과물인 converted value는 같은 레지스터에 저장된다. 32 bit register를 반으로 나누어서 상위 16비트는 ADC2 converted value, 하위 16비트는 ADC1 converted value로 저장된다. 만약 이때 threshold가 ADC_DR과 값을 비교한다면 Dual mode에서는 whatchdog를 쓸 수 없게 될 것이다. 32bit 값(ADC_DR)과 16bit 값(threshold)을 비교하면 당연히 항상 32bit 값이 크기 때문에(물론 복잡한 과정을 거치면 가능하겠지만..).

 쉽게 말해서 converted value가 ADC_DR에 저장되기 전에 threshold와 비교를 하므로써 Dual mode에서도 watchdog를 사용할 수 있게 되는 것이다.

 The analog watchdog can be enabled on one or more channels by configuring the ADC_CR1 register.

Conversion on external trigger

 Conversion can be triggered by an external event (e.g. timer capture, EXTI line). if the EXT-TRIG control bit is set then external events are able to trigger a conversion. The EXT-SEL[2:0] and JEXTSEL[2:0] control bits allow the application to select decide which out of 8 possible events can trigger conversion for the regular and injected groups.

* When an external trigger is selected for ADC regular or injected conversion, only the rising edge of the signal can start the conversion.

 'external trigger'라는 말을 조심해야 하는데 잘못 생각하면 외부에서 주는 트리거. 즉, 내부에서 트리거(SWSTART라는 것이 있는데 딱히 internal trigger라는 말은 없지만 software start라고 하면 내부 트리거 같기 때문에 적어봄)를 주면 따로 트리거를 안줘도 될 것이라 생각하게 된다. 하지만 STM32 ADC는 conversion을 하기 위해서는 무조건 external trigger를 주고 시작해야 한다. external trigger를 주고 external trigger의 종류를 선택하게 되는데 그 종류 중 하나가 

SWSTART인 것이다. 그래서 나중에 코드를 보겠지만 trigger를 주는 라이브러리 함수 중에 ADC_ExternalTrigConvCmd() 그리고 ADC_SoftwareStartConvCmd() 두 개가 있는데 ADC_SoftwareStartConvCmd() 이 함수 내부를 보게 되면 아래 ADC_CR2 register에 SWSTART bit, EXTTRIG bit  두 개를 전부 set 시켜준다.

ADC mode

 ADC는 다양한 mode가 존재하는데 각 mode에 대한 설명을 하고 mode별 차이점을 적는다. 또한 잘못 생각하기 쉬운점도 같이 알아보기.

Single conversion mode

 In Single conversion mode the ADC does one conversion. This mode is started either by setting the ADON bit in the ADC_CR2 register (for a regular channel only) or by external trigger (for a regular or injected channel), while the CONT bit is 0. 이 모드는 Continuous mode와 반대되는 개념으로써 한번 conversion이 이뤄진 후에 다음 conversion을 하기 위해서 다시 stabilization(ADC 초기 setting이라고 생각) 작업이 또 이루어진다. 계속해서 conversion 하기 전에 stabilization이 이루어짐. 

 Single mode와 Continuous mode 차이가 ADC channel을 group하느냐 안하느냐로 생각하면 안된다(group은 ADC_SQR register에서 정하는 것).  ADC channel을 group하여도 Single mode를 사용할 수 있고 Continuous mode를 사용할 수 있다. 자세한 설명은 아래서.

Once the conversion of the selected channel is complete:

@ If a regular channel was converted:

 - The converted data is stored in the 16-bit ADC_DR register

 - The EOC (End Of Conversion) flag is set

 - and an interrupt is generated if the EOCIE is set.

@ If a injected channel was converted:

 - The converted data is stored in the 16-bit ADC_DRJ1 register

 - The JEOC (End Of Conversion Injected) flag is set

 - and an interrupt is generated if the JEOCIE bit is set.

The ADC is then stopped.

Continuous conversion mode

 In continuous conversion mode ADC starts another conversion as soon as it finishes one. This mode is started either by external trigger of by setting the ADON bit in the ADC_CR2 register, while the CONT bit is 1. 처음에 한번만 stabilization이 이루어지고 그 다음 conversion부터는 stabilization이 없다.

After each conversion:

@ If a regular channel was converted:

 - The converted data is stored in the 16-bit ADC_DR register

 - The EOC (End Of Conversion) flag is set

 - An interrupt is generated if the EOCIE is set

@ If an injected channel was converted:

 - The converted data is stored in the 16- bit ADC_DRJ1 register

 - The JEOC (End Of Conversion Injected) flag is set

 - An interrupt is generated if the JEOCIE bit is set.

Scan mode

 This mode is used to scan a group of analog channels.

Scan mode can be selected by setting the SCAN bit in the ADC_CR1 register. Once this bit is set, ADC scans all the cannels selected in the ADC_SQRx registers (for regular channels) or in the ADC_JSQR (for injected channels). A single conversion is performed for each channel of the group. After each end of conversion the next channel of the group is converted automatically. If the CONT bit is set, conversion does not stop at the last selected group channel but continues again from the first selected group channel.

 When using scan mode, DMA bit must be set and the direct memory access controller is used to transfer the converted data of regular group channels to SRAM after each update of the ADC_DR register.

The injected channel converted data is always stored in the ADC_JDRx registers.

Discontinuous mode

 Regular group과 Injected group에 대한 discontinuous mode가 존재하는데 거의 똑같기 때문에 regular group discontinuous mode만 설명.

 This mode is enabled by setting the DISCEN bit in the ADC_CR1 register. It can be used to convert a short sequence of n conversions (n <= 8) which is a part of the sequence of conversions selected in the ADC_SQRx registers. The value of n is specified by writing to the DISCNUM[2:0] bits in the ADC_CR1 register.

 When an external trigger occurs, it starts the next n conversions selected in the ADC_SQRx registers until all the conversions in the sequence are done. The total sequence length is defined by the L[3:0] bits in the ADC_SQR1 register. 이 모드는 Continuous mode의 반대도 아니고 Single mode의 반대도 아니다. 조금 특별한 모드인데 기본은 Continuous mode다. 지정된 group을 Continuous mode 처럼 conversion을 하되 group 전체를 sequence conversion 하는 것이 아닌 지정 갯수 만큼 sequence conversion 하는 것. 

 쉽게 말해서 원래 정해 놓은 group을 다시 쪼개서 conversion 한다고 생각하면 된다.

Example : n = 3, channels to be converted = 0, 1, 2, 3, 6, 7, 9, 10

1st trgger: sequence converted 0, 1, 2. An EOC event is generated at each conversion

2nd trigger: sequence converted 3, 6, 7. An EOC event is generated at each conversion

3nd trigger: sequence converted 9, 10. An EOC event is generated at each conversion

4nd trigger: sequence converted 0, 1, 2. An EOC event is generated at each conversion

 When a regular group is converted in discontinuous mode, no rollover will occure. When all sub groups are converted, the next trigger starts conversion of the first sub-group.

Dual ADC mode

 dual ADC mode 안에는 ADC 두 개를 어떻게 조합하는가에 따라서 10가지에 mode가 만들어진다. 각각 모드에 대한 설명은 따로 설명.

 In dual ADC mode the start of conversion is triggered alternately or simultaneously by the ADC1 master to the ADC2 slave, depending on the mode selected by the DUALMOD[2:0] bits in the ADC1_CR1 register.

* In dual mode, when configuring conversion to be triggered by an external event, the user must set the trigger for the master only and set a software trigger for the slave to prevent spurious triggers to start unwanted slave conversion. Hovever, external triggers must be enabled on both master and slave ADCs.

 아래 그림과 같이  dual ADC mode에서 ADC2(slave) conversion trigger는 ADC1(master) internal trigger에서 주고 있다. 따라서 ADC2는 external trigger를 enable 시키고 software start를 설정해 주면 된다. 그리고 ADC1에만 내가 원하는 trigger를 선택해서 (e.g. TIM trigger, SW trigger..) enable 시켜주면 됨.

참고 : RM0008 Reference manual